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Support > Xilinx Series > Z-turn Board
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Can the Z-turn Board expansion connectors support LVDS differential input and output? |
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Question |
Can the Z-turn Board expansion connectors support LVDS differential input and output?
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Answer |
Yes. The Z-turn Board expansion connectors
are most for PL ports which can support LVDS differential input, the speed is
up to 200MHz in theory. But it needs customer to write IP core to implement
differential logic. Please refer to the Pin-outs information below:
Pinouts of CN1
Default
Function
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BGA
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Pin
Name
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CN1
|
Pin
Name
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BGA
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Default
Function
|
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VDD_5V
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1
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2
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GND
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|
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VDD_3.3V
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3
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4
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GND
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VDD18_KEY_BACKUP
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5
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6
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JTAG_TCK
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F9
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U7
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IO_L11P_T1_13
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7
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8
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JTAG_TMS
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J6
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V7
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IO_L11N_T1_13
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9
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10
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JTAG_TDI
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G6
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T9
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IO_L12P_T1_13
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11
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12
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JTAG_TDO
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F6
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U10
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IO_L12N_T1_13
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13
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14
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JTAG_NTRST
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VDDIO_13_PL
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15
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16
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IO_L14P_T2_13
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Y9
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Y7
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IO_L13P_T2_13
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17
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18
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IO_L14N_T2_13
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Y8
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Y6
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IO_L13N_T2_13
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19
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20
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IO_L21P_T3_13
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V11
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|
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V8
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IO_L15P_T2_13
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21
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22
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IO_L21N_T3_13
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V10
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W8
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IO_L15N_T2_13
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23
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24
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GND
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GND
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25
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26
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IO_L1P_T0_34
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T11
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T12
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IO_L2P_T0_34
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27
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28
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IO_L1N_T0_34
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T10
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U12
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IO_L2N_T0_34
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29
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30
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IO_L3P_T0_34
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U13
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V12
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IO_L4P_T0_34
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31
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32
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IO_L3N_T0_34
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V13
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W13
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IO_L4N_T0_34
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33
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34
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GND
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GND
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35
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36
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IO_L5P_T0_34
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T14
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P14
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IO_L6P_T0_34
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37
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38
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IO_L5N_T0_34
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T15
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RGB LED
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R14
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IO_L6N_T0_34
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39
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40
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IO_L7P_T1_34
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Y16
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RGB LED
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W14
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IO_L8P_T1_34
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41
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42
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IO_L7N_T1_34
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Y17
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RGB LED
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Y14
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IO_L8N_T1_34
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43
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44
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GND
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12M
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U14
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IO_L11P_T1_34
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45
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46
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IO_L10P_T1_34
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V15
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LCD_DATA2
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U15
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IO_L11N_T1_34
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47
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48
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IO_L10N_T1_34
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W15
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LCD_DATA3
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VDDIO_34_PL
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49
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50
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IO_L13P_T2_34
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N18
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LCD_DATA6
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LCD_DATA0
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T16
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IO_L9P_T1_34
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51
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52
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IO_L13N_T2_34
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P19
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LCD_DATA7
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LCD_DATA1
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T20
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IO_L15P_T2_34
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53
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54
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GND
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LCD_DATA4
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U18
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IO_L12P_T1_34
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55
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56
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IO_L15P_T2_34
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T20
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LCD_DATA10
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LCD_DATA5
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U19
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IO_L12N_T1_34
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57
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58
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IO_L15N_T2_34
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U20
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LCD_DATA11
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LCD_DATA8
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N20
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IO_L14P_T2_34
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59
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60
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IO_L17P_T2_34
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Y18
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LCD_DATA14
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LCD_DATA9
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P20
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IO_L14N_T2_34
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61
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62
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IO_L17N_T2_34
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Y19
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LCD_DATA15
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LCD_DATA12
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V20
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IO_L16P_T2_34
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63
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64
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IO_L19P_T3_34
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R16
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LCD_DE
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LCD_DATA13
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W20
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IO_L16N_T2_34
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65
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66
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IO_L19N_T3_34
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R17
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LCD_PCLK
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GND
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67
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68
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GND
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LCD_HSYNC
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W16
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IO_L18N_T2_34
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69
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70
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IO_L18P_T2_34
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V16
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LCD_VSYNC
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I2S_SCLK
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T17
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IO_L20P_T3_34
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71
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72
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IO_L20N_T3_34
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R18
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I2S_FSYNC_OUT
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I2S_FSYNC_IN
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V18
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IO_L21N_T3_34
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73
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74
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IO_L21P_T3_34
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V17
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I2S_Dout
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I2S_Din
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W18
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IO_L22P_T3_34
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75
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76
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IO_L24P_T3_34
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P15
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I2C0_SDA
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HDMI_INT
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W19
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IO_L22N_T3_34
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77
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78
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IO_L24N_T3_34
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P16
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I2C0_SCL
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MEMS_INTn
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N17
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IO_L23P_T3_34
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79
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80
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IO_L23N_T3_34
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P18
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BP
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Pinouts of CN2
Default
Function
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BGA
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Pin
Name
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CN2
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Pin
Name
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BGA
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Default
Function
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VDD_5V
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1
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2
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GND
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|
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VDD_3.3V
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3
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4
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GND
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|
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|
K9
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XADC_INP0
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5
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6
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DXP_0
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M9
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L10
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XADC_INN0
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7
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8
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DXN_0
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M10
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XADC_VCC
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9
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10
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GND
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PS_USER_LED1
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E6
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PS_MIO0_500
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11
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12
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PS_MIO10_500
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E9
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UART0_RX
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NAND_REn
|
D5
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PS_MIO8_500
|
13
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14
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PS_MIO11_500
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C6
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UART0_TX
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PS_USER_LED2
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B5
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PS_MIO9_500
|
15
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16
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PS_MIO14_500
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C5
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CAN0_RX
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I2C1_CLK
|
D9
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PS_MIO12_500
|
17
|
18
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PS_MIO15_500
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C8
|
CAN0_TX
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I2C1_SDA
|
E8
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PS_MIO13_500
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19
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20
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GND
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GND
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21
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22
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IO_L2P_T0_35
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B19
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C20
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IO_L1P_T0_35
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23
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24
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IO_L2N_T0_35
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A20
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G20
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IO_L18N_T2_35
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25
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26
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IO_L4P_T0_35
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D19
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E17
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IO_L3P_T0_35
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27
|
28
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IO_L4N_T0_35
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D20
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D18
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IO_L3N_T0_35
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29
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30
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GND
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GND
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31
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32
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IO_L6P_T0_35
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F16
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E18
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IO_L5P_T0_35
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33
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34
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IO_L6N_T0_35
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F17
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E19
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IO_L5N_T0_35
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35
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36
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IO_L8P_T1_35
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M17
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M19
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IO_L7P_T1_35
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37
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38
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IO_L8N_T1_35
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M18
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M20
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IO_L7N_T1_35
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39
|
40
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GND
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GND
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41
|
42
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IO_L10P_T1_35
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K19
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L19
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IO_L9P_T1_35
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43
|
44
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IO_L10N_T1_35
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J19
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L20
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IO_L9N_T1_35
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45
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46
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IO_L12P_T1_35
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K17
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L16
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IO_L11P_T1_35
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47
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48
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IO_L12N_T1_35
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K18
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L17
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IO_L11N_T1_35
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49
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50
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GND
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VDDIO_35_PL
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51
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52
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IO_L14P_T2_35
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J18
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H16
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IO_L13P_35
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53
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54
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IO_L14N_T2_35
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H18
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H17
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IO_L13N_35
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55
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56
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IO_L16P_T2_35
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G17
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F19
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IO_L15P_T2_35
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57
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58
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IO_L16N_T2_35
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G18
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F20
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IO_L15N_T2_35
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59
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60
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GND
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GND
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61
|
62
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IO_L18P_T2_35
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G19
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J20
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IO_L17P_T2_35
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63
|
64
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IO_L18N_T2_35
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G20
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H20
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IO_L17N_T2_35
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65
|
66
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IO_L20P_T3_35
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K14
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H15
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IO_L19P_T3_35
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67
|
68
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IO_L20N_T3_35
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J14
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G15
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IO_L19N_T3_35
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69
|
70
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GND
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GND
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71
|
72
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IO_L22P_T3_35
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L14
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N15
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IO_L21P_T3_35
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73
|
74
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IO_L22N_T3_35
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L15
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N16
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IO_L21N_T3_35
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75
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76
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IO_L24P_T3_35
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K16
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M14
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IO_L23P_T3_35
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77
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78
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IO_L24N_T3_35
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J16
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M15
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IO_L23N_T3_35
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79
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80
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GND
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